Kumi
b1baecaf09
- Raise error for invalid pin type for `rst` or `cs` if not `int` or `Pin` instance - Set `self.rst` based on `rst` type - Set `self.cs` based on `cs` type
306 lines
6.2 KiB
Python
306 lines
6.2 KiB
Python
from machine import Pin, SPI
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from os import uname
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class MFRC522:
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""" MicroPython class to communicate with the MFRC522 RFID module """
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# Constants
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OK = 0
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NOTAGERR = 1
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ERR = 2
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REQIDL = 0x26
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REQALL = 0x52
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AUTHENT1A = 0x60
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AUTHENT1B = 0x61
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def __init__(self, sck: int = None, mosi: int = None, miso: int = None, rst: int = None, cs: int = None, spi: SPI = None):
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""" Initialize the MFRC522 module
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For compatibility with the original library, the pins can be specified
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as arguments for WiPy, LoPy, FiPy and ESP8266. For other platforms, an
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initialized SPI object must be passed as argument.
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```python
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# For ESP8266:
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mfrc522_esp8266 = MFRC522(0, 2, 4, 5, 14)
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# For ESP32:
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from machine import SoftSPI, Pin
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sck = Pin(18, Pin.OUT)
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mosi = Pin(23, Pin.OUT)
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miso = Pin(19, Pin.OUT)
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spi = SoftSPI(baudrate=100000, polarity=0, phase=0, sck=sck, mosi=mosi, miso=miso)
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spi.init()
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sda = Pin(5, Pin.OUT)
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mfrc522_esp32 = MFRC522(spi=spi, cs=sda)
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```
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:param sck: SPI clock pin
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:param mosi: SPI MOSI pin
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:param miso: SPI MISO pin
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:param rst: Reset pin
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:param cs: Chip select pin
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:param spi: Initialized SPI object
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"""
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if not spi:
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# Initialize SPI bus on given pins
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self.sck = Pin(sck, Pin.OUT)
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self.mosi = Pin(mosi, Pin.OUT)
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self.miso = Pin(miso)
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board = uname()[0]
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# Due to differences in the SPI initialization, only the following
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# platforms are supported
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if board == 'WiPy' or board == 'LoPy' or board == 'FiPy':
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self.spi = SPI(0)
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self.spi.init(SPI.MASTER, baudrate=1000000, pins=(self.sck, self.mosi, self.miso))
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elif board == 'esp8266':
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self.spi = SPI(baudrate=100000, polarity=0, phase=0, sck=self.sck, mosi=self.mosi, miso=self.miso)
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self.spi.init()
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else:
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raise RuntimeError("Unsupported platform - please provide an initialized SPI object")
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else:
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self.spi = spi
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if rst:
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# Initialize reset pin
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if isinstance(rst, int):
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self.rst = Pin(rst, Pin.OUT)
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elif isinstance(rst, Pin):
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self.rst = rst
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else:
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raise TypeError("Invalid pin type for rst")
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self.rst.value(1)
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else:
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self.rst = None
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# Initialize chip select pin
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if isinstance(cs, int):
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self.cs = Pin(cs, Pin.OUT)
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elif isinstance(cs, Pin):
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self.cs = cs
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else:
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raise TypeError("Invalid pin type for cs")
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self.cs.value(1)
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# Continue in dedicated function
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self.init()
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def _wreg(self, reg: bytes, val: bytes):
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""" Write a value to a register
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:param reg: Register address
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:param val: Value to write
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"""
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self.cs.value(0)
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self.spi.write(b'%c' % int(0xff & ((reg << 1) & 0x7e)))
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self.spi.write(b'%c' % int(0xff & val))
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self.cs.value(1)
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def _rreg(self, reg: bytes):
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""" Read a value from a register
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:param reg: Register address
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:return: Value read
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"""
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self.cs.value(0)
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self.spi.write(b'%c' % int(0xff & (((reg << 1) & 0x7e) | 0x80)))
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val = self.spi.read(1)
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self.cs.value(1)
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return val[0]
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def _sflags(self, reg, mask):
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self._wreg(reg, self._rreg(reg) | mask)
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def _cflags(self, reg, mask):
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self._wreg(reg, self._rreg(reg) & (~mask))
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def _tocard(self, cmd, send):
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recv = []
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bits = irq_en = wait_irq = n = 0
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stat = self.ERR
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if cmd == 0x0E:
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irq_en = 0x12
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wait_irq = 0x10
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elif cmd == 0x0C:
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irq_en = 0x77
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wait_irq = 0x30
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self._wreg(0x02, irq_en | 0x80)
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self._cflags(0x04, 0x80)
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self._sflags(0x0A, 0x80)
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self._wreg(0x01, 0x00)
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for c in send:
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self._wreg(0x09, c)
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self._wreg(0x01, cmd)
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if cmd == 0x0C:
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self._sflags(0x0D, 0x80)
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i = 2000
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while True:
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n = self._rreg(0x04)
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i -= 1
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if ~((i != 0) and ~(n & 0x01) and ~(n & wait_irq)):
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break
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self._cflags(0x0D, 0x80)
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if i:
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if (self._rreg(0x06) & 0x1B) == 0x00:
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stat = self.OK
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if n & irq_en & 0x01:
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stat = self.NOTAGERR
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elif cmd == 0x0C:
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n = self._rreg(0x0A)
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lbits = self._rreg(0x0C) & 0x07
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if lbits != 0:
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bits = (n - 1) * 8 + lbits
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else:
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bits = n * 8
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if n == 0:
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n = 1
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elif n > 16:
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n = 16
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for _ in range(n):
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recv.append(self._rreg(0x09))
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else:
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stat = self.ERR
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return stat, recv, bits
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def _crc(self, data):
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self._cflags(0x05, 0x04)
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self._sflags(0x0A, 0x80)
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for c in data:
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self._wreg(0x09, c)
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self._wreg(0x01, 0x03)
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i = 0xFF
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while True:
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n = self._rreg(0x05)
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i -= 1
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if not ((i != 0) and not (n & 0x04)):
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break
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return [self._rreg(0x22), self._rreg(0x21)]
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def init(self):
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self.reset()
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self._wreg(0x2A, 0x8D)
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self._wreg(0x2B, 0x3E)
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self._wreg(0x2D, 30)
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self._wreg(0x2C, 0)
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self._wreg(0x15, 0x40)
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self._wreg(0x11, 0x3D)
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self.antenna_on()
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def reset(self):
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self._wreg(0x01, 0x0F)
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def antenna_on(self, on=True):
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if on and ~(self._rreg(0x14) & 0x03):
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self._sflags(0x14, 0x03)
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else:
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self._cflags(0x14, 0x03)
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def request(self, mode):
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self._wreg(0x0D, 0x07)
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(stat, recv, bits) = self._tocard(0x0C, [mode])
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if (stat != self.OK) | (bits != 0x10):
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stat = self.ERR
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return stat, bits
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def anticoll(self):
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ser_chk = 0
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ser = [0x93, 0x20]
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self._wreg(0x0D, 0x00)
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(stat, recv, bits) = self._tocard(0x0C, ser)
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if stat == self.OK:
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if len(recv) == 5:
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for i in range(4):
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ser_chk = ser_chk ^ recv[i]
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if ser_chk != recv[4]:
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stat = self.ERR
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else:
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stat = self.ERR
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return stat, recv
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def select_tag(self, ser):
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buf = [0x93, 0x70] + ser[:5]
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buf += self._crc(buf)
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(stat, recv, bits) = self._tocard(0x0C, buf)
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return self.OK if (stat == self.OK) and (bits == 0x18) else self.ERR
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def auth(self, mode, addr, sect, ser):
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return self._tocard(0x0E, [mode, addr] + sect + ser[:4])[0]
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def stop_crypto1(self):
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self._cflags(0x08, 0x08)
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def read(self, addr):
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data = [0x30, addr]
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data += self._crc(data)
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(stat, recv, _) = self._tocard(0x0C, data)
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return recv if stat == self.OK else None
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def write(self, addr, data):
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buf = [0xA0, addr]
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buf += self._crc(buf)
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(stat, recv, bits) = self._tocard(0x0C, buf)
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if not (stat == self.OK) or not (bits == 4) or not ((recv[0] & 0x0F) == 0x0A):
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stat = self.ERR
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else:
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buf = []
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for i in range(16):
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buf.append(data[i])
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buf += self._crc(buf)
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(stat, recv, bits) = self._tocard(0x0C, buf)
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if not (stat == self.OK) or not (bits == 4) or not ((recv[0] & 0x0F) == 0x0A):
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stat = self.ERR
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return stat
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